1. Field of the Invention
The present invention pertains to the field of complementary metal-oxide-semiconductor (CMOS) circuitry; and, specifically, to the field of high speed CMOS wideband data amplifiers for wideband data communication applications.
2. Discussion of the Related Art
High speed wideband data amplifiers are used in wideband data communication applications. For a number of reasons including speed limitations of processing technology, power consumption and other cost related concerns, it is desirable to develop efficient techniques to boost the amplifier bandwidth for higher frequency operations. High speed circuit techniques such as current-controlled CMOS (or C3MOS) logic have been developed that have brought about marked increase in the speed of circuitry fabricated using standard CMOS process technology. Various C3MOS circuit techniques are described in greater detail in commonly-assigned patent application Ser. No. 09/484,856, titled xe2x80x9cCurrent Controlled CMOS Logic Family,xe2x80x9d by A. Hairapetian, which is hereby incorporated by reference in its entirety.
Other techniques have been developed to increase the gain-bandwidth product of CMOS circuitry. For example, shunt peaking is one approach that has resulted in improved gain-bandwidth product. Shunt peaking involves putting an inductor in series with the output resistor to expand the bandwidth of the circuit. Such inductive broadbanding technique combined with C3MOS circuitry has been described in greater detail in commonly-assigned patent application Ser. No. 9/610,905, titled xe2x80x9cCurrent-Controlled CMOS Circuits with Inductive Broadbanding,xe2x80x9d by M. Green, which is hereby incorporated by reference in its entirety. The expansion of the gain-bandwidth product brought about by such inductive peaking, however, is limited to about 1.5 times, and the inductors needed are generally large which requires a large area on an integrated circuit. In wideband data communications, the usable data frequency range starts at several kilohertz and extends all the way up to many gigahertz. A wideband amplifier is required to handle such a broad spectrum of data frequencies. This is in contrast to the wireless domain where communications occurs only over a narrow band, which can be accomplished using a tuned amplifier with an inductor and a capacitor. However, a relatively constant or flat frequency response is desired over a wide frequency band in a wideband data amplifier.
Typically, in designing a wideband amplifier there is a trade off between gain and bandwidth. The product of gain and bandwidth is usually a constant for the same topology. However, by using special techniques, bandwidth can be extended while maintaining the same gain level. One conventional way is to employ a faster process technology, such as GaAs or InP when fabricating integrated circuits upon which the wideband data amplifier is implemented. However, these technologies are generally more costly and not as widely available as standard CMOS process.
As is apparent from the above discussion, a need exists for widening the high gain portion of the frequency response of the amplifier without compromising the gain, for minimizing the power consumption of the amplifier, and for eliminating expensive process requirements.
According to the present invention, expansion of the amplifier bandwidth is accomplished using the combination of shunt peaking, series peaking, and miller capacitance cancellation, which is placed at the amplifier input stage, intermediate stages, or in the last stage.
This invention achieves maximum bandwidth expansion by using series inductor peaking with miller capacitance cancellation technique and shunt inductor peaking in current controlled CMOS circuit (C3MOS). The series peaking provides a certain peak bandwidth product depending on the inductance L, the capacitance C, and the quality of these two components. The bandwidth is inversely proportional to the square root of LC. The peaking mainly depends upon the inductance due to its limited Q. By reducing the miller capacitance from the C3MOS input a wider bandwidth is obtained with adequate peaking value. The total response of the amplifier can be obtained with wider bandwidth of minimum ripple and minimum phase distortion.
According to the present invention, an amplifier stage includes a current source (preferably a biased transistor), first and second differential transistors coupled to the current source, first and second series peaking inductors coupled to the gates of the first and second differential transistors, respectively, a first output resistor and a first shunt peaking inductor connected in series and coupled to the drain of the first differential transistor, and a second output resistor and a second shunt peaking inductor connected in series and coupled to the drain of the second differential transistor.
According to another aspect of the present invention, first and second miller capacitance cancellation capacitors are cross-coupled between the drains and gates of the first and second differential transistors.
According to yet another aspect of the present invention, a multi-stage differential amplifier includes serial peaking and shunt peaking in the various stages of the multi-stage differential amplifier. According to another aspect of the present invention, miller capacitance cancellation is employed in the various stages of the multi-stage differential amplifier. The serial peaking, shunt peaking, and miller capacitance cancellation can be combined in any of various combinations throughout the various stages of the multi-stage differential amplifier. In an embodiment, the serial peaking, shunt peaking, and miller capacitance cancellation are all combined in the first stage of the multi-stage differential amplifier.
These and other features, aspects, and advantages of the present invention will be apparent from the Detailed Description of the Invention and Figures.